This Technology, Set for Presentation at SEMICON JAPAN at Tokyo Big Sight, Is to Be Applied to Computing-in-Memory Chips That Can Perform AI Inference Operations at Overwhelmingly Low Power –
Floadia Corporation, headquartered in Kodaira-shi, Tokyo, has developed a prototype 7-bit-per-cell flash memory chip that can retain analog data for 10 years at 150 degrees Celsius by devising a memory cell structure and control method. With the existing memory cell structure, the problem of characteristic change and variation due to charge leakage was significant, and the data retention was only about 100 seconds.
Floadia will apply the memory technology to a chip that realizes AI (artificial intelligence) inference operations with overwhelmingly low power consumption. This chip is based on an architecture called Computing in Memory (CiM), which stores neural network weights in non-volatile memory and executes a large number of multiply-accumulate calculations in parallel by passing current through the memory array. CiM is attracting worldwide attention as an AI accelerator for edge computing environments because it can read a large amount of data from memory and consumes much less power than conventional AI accelerators that perform multiply-accumulate calculations on CPUs and GPUs.
This memory technology is based on SONOS-type flash memory chips developed by Floadia for integration into microcontrollers and other devices. Floadia made numerous innovations such as optimizing the structure of charge-trapping layers, i.e. ONO film, to extend the data retention time when storing 7 bits of data. The combination of two cells can store up to 8 bits of neural network weights, and despite its small chip area, it can achieve a multiply-accumulate calculation performance of 300 TOPS/W, far exceeding that of existing AI accelerators.
The content of this technology will be exhibited at a booth (booth number 1746) of SEMICON JAPAN to be held at Tokyo Big Sight from December 15 to 17, 2021, and Floadia’s CTO, Yasuhiro Taniguchi will give a lecture at “TechSTAGE” from 11:15 a.m. (JST) on December 15.